[HDLBits] Countbcd

Build a 4-digit BCD (binary-coded decimal) counter. Each decimal digit is encoded using 4 bits: q[3:0] is the ones digit, q[7:4] is the tens digit, etc. For digits [3:1], also output an enable signal indicating when each of the upper three digits should be incremented.

You may want to instantiate or modify some one-digit decade counters.

module top_module (
    input clk,
    input reset,   // Synchronous active-high reset
    output [3:1] ena,
    output [15:0] q);
    wire ena0;
    always@(posedge clk) begin
        if(reset)
            ena0=1;
    end
    bcd1 counter1(clk,reset,ena0,q[3:0]);
    assign ena[1]=(q[3:0]==4'h9);
    bcd1 counter2(clk,reset,ena[1],q[7:4]);
    assign ena[2]=(q[7:0]==8'h99);//这里必须是8‘h99，因为是16进制的99才进位
    bcd1 counter3(clk,reset,ena[2],q[11:8]);
    assign ena[3]=(q[11:0]==12'h999);
    bcd1 counter4(clk,reset,ena[3],q[15:12]);
    
endmodule
module bcd1 (
    input clk,
    input reset,        // Synchronous active-high reset
    input ena,//表示下一级传来的标志位，若标志位为1说明这一级该+1了
    output [3:0] q);
	always@(posedge clk) begin
        if(reset)
            q<=4'b0;
        else if(ena) begin
            if(q==9)
                q<=0;
            else
                q<=q+1;
        end
        else;
    end
endmodule